﻿ ASM Optimized routines
19 May, 2013, 20:34:49
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Xeda112358
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 « Reply #30 on: 01 December, 2011, 18:07:15 » 0

Hmm, here is a signed division routine I wrote... I compared it to the HL_Div_BC routine I wrote.
If both inputs are positive, this is exactly the same speed, but if both are negative, it takes 50 cycles more and if only one is negative, it takes 71 cycles more.
 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960 ;===============================================================HL_SDiv_BC:;===============================================================;Performs HL/BC;Speed:   1494 cycles;         **same cycles as the regular HL_Div_BC;         add 25 if HL is negative;         add 25 if BC is negative;         add another 46 if only one is negative ;Size:    54 bytes;         **31 bytes larger than the regular HL_Div_BC;Inputs:;     HL is the numerator;     BC is the denominator;Outputs:;     HL is the quotient;     DE is the remainder;     BC is not changed;     A is 0;     z flag is set;     c flag is reset;===============================================================     ld a,h     xor b     and 128     push afabsHL:     bit 7,h     jr z,absBC     ld a,l \ cpl \ ld l,a     ld a,h \ cpl \ ld h,a     inc hlabsBC:     bit 7,b     jr z,\$+9     ld a,c \ cpl \ ld c,a     ld a,b \ cpl \ ld b,a     inc bc     add hl,hl       ld a,15       ld de,0Div_Loop_1:         add hl,hl         ex de,hl         adc hl,hl         or a         sbc hl,bc         jr c,\$+5           inc e           jr \$+3         add hl,bc         ex de,hl         dec a         jr nz,Div_Loop_1       pop af \ ret z     ld a,l \ cpl \ ld l,a     ld a,h \ cpl \ ld h,a     inc hl       ret
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