Omnimaga
Calculator Community => TI Calculators => ASM => Topic started by: Deep Toaster on September 21, 2010, 07:33:12 pm
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A couple of quick questions regarding the flags register:
- Is H basically a carry flag for the right nibble of the accumulator? Meaning if I do
LD A,15
INC Ait should be set, right?[/li]
- Is V set when the 7th bit changes from one to zero? Meaning if I do
LD A, 128
DEC A
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You should probably use better topic titles. I edited your topic name from "F" to "A couple of quick questions regarding the flags register"
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A couple of quick questions regarding the flags register:
- Is H basically a carry flag for the right nibble of the accumulator? Meaning if I do
LD A,15
INC Ait should be set, right?[/li]
[li]Is V set when the 7th bit changes from one to zero? Meaning if I do[/li]
LD A, 128
DEC A
[/quote]
Mostly correct on both points. However, it should be clarified that the overflow is set if an addition/subtraction carries across the 127 to -128 mark (which it does in your example)
Edit:
Also, maybe this will make it clearer. If the result of the addition or subtraction (when you don't lock the result to 8 bits) is less than -128 or larger than 127, the overflow flag is set.
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You should probably use better topic titles. I edited your topic name from "F" to "A couple of quick questions regarding the flags register"
Oh, okay. I was just bored :P
A couple of quick questions regarding the flags register:
- Is H basically a carry flag for the right nibble of the accumulator? Meaning if I do
LD A,15
INC Ait should be set, right?[/li]
[li]Is V set when the 7th bit changes from one to zero? Meaning if I do[/li]
LD A, 128
DEC A
[/quote]
Mostly correct on both points. However, it should be clarified that the overflow is set if an addition/subtraction carries across the 127 to -128 mark (which it does in your example)
Edit:
Also, maybe this will make it clearer. If the result of the addition or subtraction (when you don't lock the result to 8 bits) is less than -128 or larger than 127, the overflow flag is set.
[/quote]
Okay, thanks!
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Oh, quick question:
The carry flag is set when a number overflows, right? Like:
ld hl, 255
inc hl
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The inc and dec instructions don't affect flags when used with 16-bit register pairs.
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Oh, I was wondering why those tutorials always skip over the flags for inc [16-bit reg]. Thanks!
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For some reason, the carry flag is NOT set when a number overflows with inc/dec, not even an 8-bit one.
For example:
ld l, 255
inc l
does not affect the carry flag.
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Wait, really?
EDIT: Oh, wait: http://future_history.freehostia.com/Files/Resources/ASM/ASMin28Days/ref/z80is.html (http://future_history.freehostia.com/Files/Resources/ASM/ASMin28Days/ref/z80is.html)
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For some reason, the carry flag is NOT set when a number overflows with inc/dec, not even an 8-bit one.
For example:
ld l, 255
inc l
does not affect the carry flag.
That got me good when I first started learning Z80 ASM. For a quick reference, take a look at this thing that every Z80 ASM developer ought to have: http://www.ticalc.org/pub/text/z80/z80instr.txt
I frequently view it when I'm unsure what flags any given instruction will affect. A "." indicates that the flag is not affected and a "*" indicates that the flag will be affected by its definition, whatever that may be (like when you add two numbers together and the result is over 255, the carry flag will be set). It is rather convenient how they set it all up, too.
EDIT: More often than not, I'll view that file just to find out how many bytes that particular instruction will take up. Great for those labelless jumps like "jr $+N"
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Thanks! That'll be useful...
Oh, and I know Tim refers to T-states, but what's Lem?
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It's "Len" or "Length". That's the number of bytes that instruction takes.
EDIT: That's what I really use that file for :)
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Oh ... right.
And I've seen an M used for time somewhere. What's that? It seems to be 1/4 of T or something. Maybe it's just the length?
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Oh. Those are machine cycles. Since the shortest instruction is 4 T-cycles (I like to use the term "clock cycle" or CC for this), it might be easier to represent some instructions in terms of machine cycles. The only real benefit is dealing with smaller numbers, though I don't really like using them because of all those odd instructions that will not divide evenly with 4. Like your 2 byte ADD instructions (11CCs) and your two byte inc/dec instructions (6CCs).
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Here's another reference I use all the time. Just go to Appendices->Technical References and Datasheets ->Z80 Instruction Set.
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I use this one! http://www.ticalc.org/archives/files/fileinfo/427/42722.html (http://www.ticalc.org/archives/files/fileinfo/427/42722.html)
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Here's another reference I use all the time. Just go to Appendices->Technical References and Datasheets ->Z80 Instruction Set.
Yup, that's what I use, but online: http://future_history.freehostia.com/Files/Resources/ASM/ASMin28Days/ref/z80is.html (http://future_history.freehostia.com/Files/Resources/ASM/ASMin28Days/ref/z80is.html)
Oh. Those are machine cycles. Since the shortest instruction is 4 T-cycles (I like to use the term "clock cycle" or CC for this), it might be easier to represent some instructions in terms of machine cycles. The only real benefit is dealing with smaller numbers, though I don't really like using them because of all those odd instructions that will not divide evenly with 4. Like your 2 byte ADD instructions (11CCs) and your two byte inc/dec instructions (6CCs).
Okay, so they don't really exist and are just T/4, is that it?
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Oh. Those are machine cycles. Since the shortest instruction is 4 T-cycles (I like to use the term "clock cycle" or CC for this), it might be easier to represent some instructions in terms of machine cycles. The only real benefit is dealing with smaller numbers, though I don't really like using them because of all those odd instructions that will not divide evenly with 4. Like your 2 byte ADD instructions (11CCs) and your two byte inc/dec instructions (6CCs).
Okay, so they don't really exist and are just T/4, is that it?
I think they do exist, but they aren't very important to know about from a software-development standpoint. For example, the LD A,(HL) instruction takes 7 clock cycles and 2 machine cycles (4 cycles for the opcode execution and 3 cycles for the memory read).
On the Gameboy's GBZ80, though, machine cycles are always 4 cycles.
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I use this one! http://www.ticalc.org/archives/files/fileinfo/427/42722.html (http://www.ticalc.org/archives/files/fileinfo/427/42722.html)
Me too! ;D
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I know this is off-topic, but Since when ticalc.org accepts anything else than zip files in the non-Windows/Mac/anything other than TI-81 directories? O.o
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Hmm, does anyone have an info file that includes both the M and T cycles?
I know this is off-topic, but Since when ticalc.org accepts anything else than zip files in the non-Windows/Mac/anything other than TI-81 directories? O.o
It's an informational file, though...
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Weird, I always thought they were uploaded in zip files, though x.x, for the purpose of having the zip viewer thing at the bottom of the page
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The clock cycle information you guys are viewing isnt completely accurate. Depending on wether the register value has to be prefetched or not will actually increase the number of clocks. The links Ive looked over on this post dont mention this, but the values that they give are actually based off of the best possible scenario. Its been a while, and I could be wrong though. But if you really need to know the exact times of the instructions I would do some research on the prefetch. You probably dont need to get it that exact though ;)
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You probably dont need to get it that exact though ;)
Working on a JS emu :P
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The clock cycle information you guys are viewing isnt completely accurate. Depending on wether the register value has to be prefetched or not will actually increase the number of clocks. The links Ive looked over on this post dont mention this, but the values that they give are actually based off of the best possible scenario. Its been a while, and I could be wrong though. But if you really need to know the exact times of the instructions I would do some research on the prefetch. You probably dont need to get it that exact though ;)
I don't think the Z80 is modern enough to have all that prefetching and junk messing with timing. Things were a lot simpler in the 80's :P
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You probably dont need to get it that exact though ;)
Working on a JS emu :P
JS? JavaScript?/me is confused
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I am confused as well o.o
I know Netham45 wants to work on a JS emu, though (online calc emu)
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I don't think the Z80 is modern enough to have all that prefetching and junk messing with timing. Things were a lot simpler in the 80's Tongue
Heres something to look at: http://www.ftp83plus.net/Tutorials/z80optiA.htm . You are correct, there is no prefetch on the z80. In the document he mentions the intel 8088 and I think that maybe he got confused. My information did not come from that file though, I had read it in an assembly programming book years ago. For the past hour I have been trying to find out exactly what the chip is doing. Ive read that Zilog has never released the internal sequencing to the z80 so I dont think that I can verify anything on paper. I remember reading about how if the same registers or instructions have already been fetched, the z80 will not have to fetch them for the next instruction, thus saving at least one clock cycle. Unfortunately, I dont have the book anymore.
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Don't we have to take the rest of the hardware into account too, though?
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I am confused as well o.o
I know Netham45 wants to work on a JS emu, though (online calc emu)
Yeah, I just started working on a Javascript emu. Messing with half-carry if fuuun... :P
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Yeah, I just started working on a Javascript emu. Messing with half-carry if fuuun... :P
I was working on an emu the other day too. Wouldn't this work pretty well for the half carry?
((A & 0xF) + (B & 0xF)) & 0x10
Just take the bottom nibbles of each and check for a carry out of them.
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Yeah, that's the third option I've heard of. I also saw one using two bitwise XORs, and that confused me :P
EDIT: Currently I'm using the one you just posted, but with % 0x10 instead of & 0xF. Should be the same, but took a bit to get my head around.
EDIT2: Wow, guess there are several people doing emus in JS...
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Nice. I wonder if this could be an united project between Netham45, you and Thepenguin77? It migth help finding optimizations and ways to make it run faster (and in all browsers except IE)
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I don't think the Z80 is modern enough to have all that prefetching and junk messing with timing. Things were a lot simpler in the 80's Tongue
Heres something to look at: http://www.ftp83plus.net/Tutorials/z80optiA.htm . You are correct, there is no prefetch on the z80. In the document he mentions the intel 8088 and I think that maybe he got confused. My information did not come from that file though, I had read it in an assembly programming book years ago. For the past hour I have been trying to find out exactly what the chip is doing. Ive read that Zilog has never released the internal sequencing to the z80 so I dont think that I can verify anything on paper. I remember reading about how if the same registers or instructions have already been fetched, the z80 will not have to fetch them for the next instruction, thus saving at least one clock cycle. Unfortunately, I dont have the book anymore.
Well, after doing a small bit of research, it seems that the Z80 has a "fetch/execute overlap" for some instructions. Source. (http://www.z80.info/z80arki.htm) Though, this doesn't mean that the timing will change from case-to-case. The thing is, timings are not calculated best-case scenario depending on whether the instruction has been "prefetched" or not. More likely, the timing is the number of cycles between the fetch of the current instruction and the fetch of the next instruction. That way, there is no room for debate on cycle times.
Edit: removed duplicate quote
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Nice. I wonder if this could be an united project between Netham45, you and Thepenguin77? It migth help finding optimizations and ways to make it run faster (and in all browsers except IE)
I don't know JS, I was writing mine in C++. But I'm sure I could figure out quite a bit of it in a day since I'm already pretty good at C++.
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Ah ok. My big concern is getting JS to work fine in all browsers. I heard it was one hard task. In firefox, I think even good javascript threw full of errors x.x
If anyone take on such project, good luck! Btw, do you think it could be made so it runs at a decent framerate? To save bandwidth, Netham45 had to set his emu to about 3 frames a second.