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Calculator Community => TI Calculators => ASM => Topic started by: z80man on June 07, 2011, 12:46:16 pm

Title: flag register question (solved)
Post by: z80man on June 07, 2011, 12:46:16 pm
As many can tell from my avatar I'm working on an 83+/84+ emulator for the Prizm. I did have one question when it came to the half-carry flag. Can it be OR'd with bit 4 of the result byte or do I have to process the lower nibble of the operands and check for a half-carry there. Because the SuperH does not use flag registers testing for these conditions can be difficult so I'm hoping that I can just OR the bit, but if not I will have to add many cycles to the emulator to get the proper result.
Title: Re: flag register question
Post by: Runer112 on June 07, 2011, 03:45:24 pm
Yes, you do actually have to check if a half-carry occured. So something like this would not result in the half-carry flag being set:

    %00010000
 +  %00001000
    %00011000


But this would:

    %00011000
 +  %00001000
    %00100000
Title: Re: flag register question
Post by: z80man on June 08, 2011, 08:08:00 pm
Ah I see, I'm guessing the same thing for the carry flag on 16 bit operations
Title: Re: flag register question
Post by: Runer112 on June 08, 2011, 08:10:19 pm
Yes, 16-bit operations affect the half-carry flag similarly. However instead of detecting carry at the bit 7/bit 8 boundary like you might expect a half-carry to do for a 16-bit operation, it's actually the bit 11/bit 12 boundary.
Title: Re: flag register question
Post by: z80man on June 08, 2011, 08:13:51 pm
okay I see how this works. Funny thing is that jumps are the fastest routines to emulate while simple arithmetic is the slowest due to the flag register. On 16 bit operations is the carry flag affected by the bit 7/8 boundary or the bit 15/16 boundary